Qi Liang, he has served as an assistant professor in Department of Micro/Nano Electronics, Shanghai Jiaotong University （SJTU）. His research mainly focuses on High-performance Analog-to-digital Converter (ADC) Design and Analog Front End Design for biomedical applications. He received B.Sc. degree in Integrated Circuit and Integration System from Xidian University, China, in 2012. He received Ph.D. degree in Electrical and Computer Engineering at University of Macau (UM), Macao, China. He has been a visiting scholar at Ulm University, Germany from Aug. 2016 to Aug. 2017. Before he joined SJTU, he has worked in Hisilicon, Shanghai, where he conducted the ADC design used for transmitter in the mobile phones. Dr. Qi has published 10+ Journal/Conference Paper, including ISSCC, JSSC, TCAS-I, etc. Dr. Qi received Macao Scientific and Technology R&D for Postgraduate Award (Master Level) in 2016 and Excellent Student Paper Award in 13th ASICON in 2019, respectively. As for the academic service, he has been a reviewer for IEEE Journals, including JSSC, TCAS-I, TCAS-II, etc. He ever served as a session chair in ISICAS 2020.

• Liang Qi, A. Jain, D. Jiang, S.-W. Sin, R. P. Martins and M. Ortmanns, “A 76.6dB-SNDR 50MHz-BW 29.2mW Noise Coupling Assisted CT Sturdy MASH ΔΣ Modulator with 1.5b/4b Quantizers in 28nm CMOS”, IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2019. (“Chip Olympics”) ( Click here to download！)

• Liang Qi, A. Jain, D. Jiang, S.-W. Sin, R. P. Martins and M. Ortmanns, “A 76.6dB-SNDR 50MHz-BW 29.2mW Multibit CT Sturdy MASH ΔΣ Modulator with DAC Non-linearity Tolerance”, in IEEE Journal of Solid-State Circuits, Vol. 55, No. 2, pp. 344-355, Feb. 2020. ( Click here to download！)

• Liang Qi, S.-W. Sin, S.-P. U, R. P. Martins and F. Maloberti, “A 4.2mW 77.1dB-SNDR 5MHz-BW DT 2-1 MASH ΔΣ Modulator with Multirate Opamp Sharing”, in IEEE Transactions on Circuits and Systems I – Regular Papers, Vol. 64, No. 10, pp. 2641-2654, Oct. 2017. ( Click here to download！)

• Liang Qi, S.-W. Sin, S.-P. U and R. P. Martins, “Resolution-enhanced sturdy MASH delta–sigma modulator for wideband applications”, in IET, Electronics Letters, Vol. 51, No. 14, pp. 1061–1063, Jul. 2015. ( Click here to download！)

• Liang Qi, S.-W. Sin and R. P. Martins, “Multibit sturdy MASH delta-sigma modulator with error-shaped segmented DACs for wideband low-power applications”, IEEE International Conference on ASIC (ASICON), Oct. 2019. (Excellent Student Paper) ( Click here to download！)

• Jiang, Liang Qi, S.-W. Sin, F. Maloberti, and R. P. Martins, “A 5MHz-BW, 86.1dB-SNDR 4X Time-Interleaved 2nd-order ΔΣ Modulator with Digital Feedforward Extrapolation in 28nm CMOS”, IEEE Symposium on VLSI Circuits, Jun. 2020. ( Click here to download！)